mzychla/siglent_sdg_lib
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This commit is contained in:
Zychlix 2026-04-07 11:24:57 +02:00
parent 1a46f8acf7
commit 264b8744e6
1 changed files with 8 additions and 0 deletions
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8
src/siglent_sdg/siglent.py
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@ -84,6 +84,8 @@ class SiglentGen:
def initialize(self):
self.instr.write("*RST")
self.instr.write("*CLS")
self.enable_10M_out()
self.enableSync()
# ---- Global commands ----
def identify(self) -> str:
@ -94,3 +96,9 @@ class SiglentGen:
def get_error(self):
return self.instr.query("SYST:ERR?")
def enable_10M_out(self):
self.instr.write("ROSC 10MOUT,ON")
def enableSync(self):
self.instr.write("C1:SYNC:OUT_MODE Square")