mzychla/RigolDSOPy
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

smieci

Browse Source
This commit is contained in:
Zychlix
2026-04-10 12:57:00 +02:00
parent b4ebac4c25
commit fbfd63849c
1 changed files with 3 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/rigol_dho_lib/rigol.py
+3 -3
View File
@@ -26,7 +26,7 @@ class Channel:
self.scale_V = 5 self.scale_V = 5
self.setProbe(self.probe) self.setProbe(self.probe)
# self.setVScale(self.scale_V) self.setVScale(self.scale_V)
self.last_scale = 1 # V/div self.last_scale = 1 # V/div
@@ -129,8 +129,8 @@ class Channel:
def clampVscale(self, val): def clampVscale(self, val):
if val > 100: if val > 100:
val = 100 val = 100
if val < 0.0001: if val < 0.01:
val = 0.0001 val = 0.01
return val return val
def getSpan(self): # display the difference between min and max voltage in dump def getSpan(self): # display the difference between min and max voltage in dump